The LT6018 is an ultra-low noise (1.2nV/√Hz at 1kHz) op amp with ultra-low distortion (–115dB at 1kHz). The device features a 15MHz gain-bandwidth product, a maximum offset voltage of 50μV, and a maximum offset voltage drift of 0.5μV/°C. This combination of features makes it suitable for driving a variety of high resolution analog-to-digital converters ( ADCs ). How do you achieve the best signal-to-noise ratio (SNR) and total harmonic distortion (THD) when driving the high-speed 18-bit and 20-bit successive approximation register (SAR) ADCs with the LT6018? This "design point" gives the corresponding Circuit and optimization strategy. Superlinear 20-bit ADC Figure 1 shows a modification of the DC2135A demonstration circuit that uses the LT1068 (replaces the LT1468) to drive the LTC2378-20 20-bit SAR ADC. The LTC2378-20 is eye-catching for its unmatched 2ppm linear performance. The best way to generate a differential signal while maintaining linearity is to use a precision matching resistor in the LT5400 used in the demo board. The detailed operation of the circuit shown in Figure 1 can be found in “Design Point 1032†(in this design point, the LTC2377-20 is driven by the LT1468). Figure 1: DC2135A Demo Board Setup To measure the linearity of the circuit, an ultrapure sine wave is fed into the input and the FFT is calculated at the output. The final THD measurement acts as a proxy for the performance of the circuit INL (integral nonlinearity). At an ADC sampling rate of 800kHz, we use an input frequency of approximately 100Hz (slightly adjusted to ensure coherent sampling, thereby relaxing the FFT value limit). The original demonstration circuit included an RC low-pass filter immediately after the op amp to filter out excessive high frequency noise. The noise density of the LT6018 is maintained at a relatively low level even at high frequencies, so the effect of removing this filter on total noise is negligible. Without this filter, linearity (measured in THD) is significantly improved because single-ended to differential conversion is now fully controlled by the precision matching resistors in the LT5400 and does not suffer from any poorly matched discrete components. Damage. The low noise density of the LT6018 makes it suitable for circuits that require gain. When configured with a gain of 10, the signal strength is increased by 20 dB and the SNR is reduced by 2 dB (relative to full scale). This arrangement improves the effective signal to noise ratio by 18 dB if the input signal is small. As expected, the linearity is reduced by the same gain as the amplifier loop, which is about 20 dB. The results are summarized in Table 1. Table 1: SNR and THD Results for LT6018 Driven LTC2378-20 Drive a high speed 18-bit ADC The LTC2387-18 is an 18-bit SAR ADC with a sampling rate of up to 15Msps. At this sample rate, the ADC's internal sampling capacitor is connected to the amplifier output for less than 30ns ("acquisition time"). During this time, the amplifier (and filter) circuit must recover from the charge-back state and replenish the charge of the sampling capacitor, so the ADC can measure the correct input voltage during the next conversion cycle. Careful optimization of the amplifier and filter network is necessary. In Figure 2, the two LT6018s are configured as unity-gain followers and connected to the LTC2387-18 demo board, which has filter resistors and capacitors placed at the ADC input. Figure 2: LT6018 Drive LTC2387-18 (with DC2290A-A Demo Board) Table 2 lists the SNR and THD results under the condition that a 1.08 kHz pure sine wave is fed into the input and the ADC has a coherent sampling rate of 14.680 Msps. The first entry gives the result of using the LT6200 amplifier, a very high speed, low noise op amp. The filter configuration is the default bandwidth of the demo board of approximately 200MHz. This provides complete stabilization of the ADC charge kickback, resulting in an excellent THD of –120dB. However, the SNR is 2dB lower than the 96dB of the ADC. Table 2: SNR and THD Results for the LT6018 Driven LTC2387-18 The LT6018 has a lower bandwidth than the LT6200, but DC accuracy (offset and drift) is much better. However, inserting the LT6018 into the same configuration as the LT6200 significantly reduces SNR and THD performance. The reason for the decrease in the SNR indicator is that the amplifier noise density is higher than its bandwidth compared to its bandwidth, and the noise will alias into the ADC if it is not filtered out. The degradation of the THD indicator is due to the fact that the slower amplifier is not fully stabilized when subjected to a large number of ADC charge kickbacks, and the nonlinear residue is left to the ADC for digitization. We can filter out wideband amplifier noise by adding resistor and capacitor values ​​and by placing a differential capacitor between the two ADC inputs. Doing so improves the SNR to 96dB, the theoretical maximum of the ADC, which means that the integrating amplifier noise has become negligible. In addition, by tilting the filter configuration in a direction that uses smaller series resistors and larger capacitors, the initial effect of charge kickback can be attenuated, improving THD performance (well below –100 dB). in conclusion The new SAR ADC combines low noise with high linearity and precise DC offset accuracy. Achieving these performance metrics requires an amplifier with the same good DC specifications, low noise, and sufficient bandwidth, such as the LT6018. With a medium speed ADC (eg 1Msps 20-bit LTC2378-20), the LT6018 combines a precision-matched LT5400 resistor to generate a differential input signal without the need for additional filtering. When using ultra-fast SAR ADCs (such as the 18-bit 15Msps LTC2387-18), superior noise and linear performance can be achieved by careful optimization of an RC filter network between the op amp and the ADC.
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March 03, 2023